High Speed Data Communications
Communications links in board level systems are moving to high-speed serial buses and the amount of data being passed through them is greatly increasing. Such buses as PCI-Express (PCIe) are aimed at replacing PCI for applications such as interfacing video cards in computing. PCIe has serial data rates (2.5 GT/s, 5.0 GT/s, and 8 GT/s) that are firmly in the microwave arena, requiring significant attention to signal integrity and a new approach to testing. Issues such as jitter, noise, crosstalk, reflections and high frequency losses need to be accurately modelled, simulated and verified in hardware to ensure the design meets specification.
The throughput of many racks of communication equipment is often limited by the backplane. Considered the hardest part of a system to upgrade cost-effectively, there is a lot of effort going into squeezing more bandwidth out of legacy products. This is no trivial exercise when some were designed for 1.5 Gb/s and are now expected to function with upgraded line cards at 3 or even 6 Gb/s. Effort is also going into 10 Gb/s and higher, mainly aimed at new rack installations. Pre-emphasis and equalization are frequently employed to overcome backplane frequency response effects.
Many applications require accurate and easy signal integrity validation.
BERTs (Bit Error Rate Testers) have traditionally been the 'Swiss Army Knife' of test, proving useful in many satellite, government, signal integrity, and research applications. The flexibility of pattern, interface parameters, and now stress means that engineers are not tied to any one standard. This also allows experimentation with the limits of device performance, and new protocols to be tried out in board design when protocol equipment has not yet become available. The BERTScope – Bit Error Rate Tester and sampling Scope is the future for testing high speed datacomms.